标准状态 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行,指向军标 现行 现行 被替代 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 标准项目 循环温湿度偏置寿命 稳态温湿度偏置寿命 加速水汽抵抗性-无偏置高压蒸煮 高温贮存寿命 温度循环 上电温循 热冲击 盐雾 温度,偏置电压,以及工作寿命 密封 高加速温湿度应力试验(HAST)(有偏置电压未饱和高压蒸汽) 安装在单面板底面的小型表贴固态器件耐浸焊能力的评价流程 塑封表贴器件水汽诱发的应力敏感性(被J-STD-020替代) 塑封表贴器件可靠性试验前的预处理 静电放电敏感性试验(ESD)人体模型(HBM) 静电放电敏感性试验(ESD)机器模型(MM) 电可擦除可编程只读存储器(EEPROM)编程/擦除耐久性以及数据保持试验 加速水汽抵抗性——无偏压HAST(无偏置电压未饱和高压蒸汽) 低温贮存寿命 用于集成电路的有机材料的水汽扩散率以及水溶解度试验方法 锡及锡合金表面镀层晶须生长的测试方法 功率循环 物理尺寸 外部目检 可焊性 振动,变频 英文部分是从JEDEC.org网站获取,中文部分为自己翻译,不保证中文译稿翻译的准确和完整性。因此,请批判性的使用本文档。 2 最后一次检查标准版本是在2014-6-20
顺序号 27. 28. 29. 30. 31. 32. 33. 34. 35. 36. 37. 38. 39. 40. 41. 42. 43. 标准编号 B104 B105 B106 B107 B108 B109 B110 B111 B112 B113 B114 B115 B116 B117 B118 C100 C101 现行版本 C Nov 2004 D Jul 2011 D Apr 2008 D Mar 2011 B Sep 2010 A Jan 2009 B Jul 2013 Jul 2003 A Oct 2009 A Sep 2012 A May 2011 A Aug 2010 A Aug 2009 B May 2014 Mar 2011 / F Oct 2013 2标准状态 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 现行 已废止 现行 标准项目 机械冲击 引出端完整性 通孔安装期间的耐焊接冲击 标识耐久性 表贴半导体器件的共面性试验 倒装芯片拉脱试验 组件机械冲击 手持电子产品组件的板级跌落试验 高温封装翘曲度测试方法 手持电子产品组件互连可靠性特性的板级循环弯曲试验方法 标识可识别性 焊球拉脱试验 引线键合的剪切试验 焊球剪切 半导体晶圆以及芯片背面外目检 高温连续性 静电放电敏感性试验(ESD)场诱导带电器件模型 JESD22- B Published: Sep-2000 Superseded SUPERSEDED BY THE TEST METHODS INDICATED BY 'JESD22-' A complete set of test methods can be obtained from Global Engi-neering Documents JESD22-A100C Published: Oct-2007 CYCLED TEMPERATURE HUMIDITY BIAS LIFE TEST: The Cycled Temperature-humidity-bias Life Test is performed for the purpose of evaluating the reliability of nonhermetic packaged solid state devices in humid environments. It employs conditions of tem-perature cycling, humidity, and bias that accelerate the penetration of moisture through the external protective material (encapsulate or seal) or along the interface between the external protective material and the metallic conductors that pass through it. The Cycled Tem-perature-Humidity-Bias Life Test is typically performed on cavity packages (e.g., MQUADs, lidded ceramic pin grid arrays, etc.) as an alternative to JESD22-A101 or JESD22-A110. JESD22-A101-B Published: Apr-1997 STEADY-STATE TEMPERATURE HUMIDITY BIAS LIFE TEST: This standard establishes a defined method and conditions for per-forming a temperature humidity life test with bias applied. The test is used to evaluate the reliability of non-hermetic packaged solid state devices in humid environments. It employs high temperature and humidity conditions to accelerate the penetration of moisture through external protective material or along interfaces between the external protective coating and conductors or other features which pass through it. This revision enhances the ability to perform this test on a device which cannot be biased to achieve very low power dissipation. JESD22- B 发布:2000年9月 已被取代 被系列测试方法“JESD22-”取代 “JESD22-”是一个完整的系列试验方法,可在全球性的工程文件中取得。 JESD22-A100C 发布:2007年10月 循环温湿度偏置寿命试验 循环温湿度偏置寿命试验以评估非气密封装固态器件在潮湿环境中的可靠性为目的。它使用循环温度,湿度,以及偏置条件来加速水汽对外部保护性材料(封装或密封)或沿着外部保护材料和贯通其的金属导体的界面的穿透作用。循环温湿度偏置寿命试验通常用于腔体封装(例如MQIADs,有盖陶瓷引脚阵列封装等),作为JESD22-A101或JESD22-A110的替代试验。 1. JESD22 2. A100 循环温湿度偏置寿命 JESD22-A101-B 发布:1997年8月 稳态温湿度偏置寿命试验 本标准建立了一个定义的方法,用于进行一个施加偏置电压的温湿度寿命试验。本试验用于评估非气密封装固态器件在潮湿环境下的可靠性。试验采用高温和高湿条件以加速水汽对外部保护材料或沿着外部保护材料和外部保护涂层,贯通其的导体或其他部件的穿透作用。本修订版加强了在无法施加偏置以达到很低功率耗散的器件上运用本试验的能力。 3. A101 稳态温湿度偏置寿命 JESD22-A102-C Published: Dec-2000 Reaffirmed June 2008 ACCELERATED MOISTURE RESISTANCE - UNBIASED AUTO-CLAVE: This test allows the user to evaluate the moisture resistance of non-hermetic packaged solid state devices. The Unbiased Autoclave Test is performed to evaluate the moisture resistance integrity of non-hermetic packaged solid state devices using moisture condens-ing or moisture saturated steam environments. It is a highly acceler-ated test which employs conditions of pressure, humidity and tem-perature under condensing conditions to accelerate moisture pene-tration through the external protective material (encapsulant or seal) or along the interface between the external protective material and the metallic conductors passing through it. This test is used to identify failure mechanisms internal to the package and is destructive. JESD22-A103C Published: Nov-2004 HIGH TEMPERATURE STORAGE LIFE: The test is applicable for evaluation, screening, monitoring, and/or qualification of all solid state devices. High Temperature storage test is typically used to determine the effect of time and temperature, un-der storage conditions, for thermally activated failure mechanisms of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). During the test elevated temper-atures(accelerated test conditions) are used without electrical stress applied. This test may be destructive, depending on Time, Tempera-ture and Packaging (if any). JESD22-A102-C 发布:2000年12月,2008年6月经重新确认有效 加速水汽抵抗性——无偏置高压蒸煮 本试验允许用户评估非气密封装固态器件对水汽的抵抗力。进行无偏置高压蒸煮试验的目的在于利用水汽冷凝或水汽饱和蒸汽环境评估非气密封装固态器件的水汽抵抗力。本方法是一个高加速试验,使用冷凝条件下的压力,湿度和温度以加速水汽对外部保护性材料(封装或密封)或沿着外部保护材料和贯通其的金属导体的界面的穿透作用。这一试验用于识别封装内部的失效机理,本试验为破坏性。 4. A102 加速水汽抵抗性-无偏置高压蒸5. A103 高温贮存寿命 煮 JESD22-A103C 发布:2004年11月 高温贮存寿命: 试验可应用于所有固态器件的评估,筛选,监控,以及鉴定。典型情况下,高温贮存试验用于确定在贮存条件下,时间和温度对固态器件,包括非易失存储器件(数据保留失效机理)的影响(由热激发的失效机理)。在试验中,只施加提高的温度应力(加速试验条件),而不施加电应力。本试验取决于时间,温度和包装(如果有),可能为破坏性。 JESD22-A104C Published: May-2005 TEMPERATURE CYCLING: This standard provides a method for determining solid state devices capability to withstand extreme temperature cycling. Changes in this revision include requirements that the worst-case load temperature must reach the specific extremes rather than just requiring that the chamber ambient temperature reach the extremes. This ensures that the test specimens will reach the specified temperature extremes regardless of chamber loading. Definitions are provided for Load, Monitoring Sensor, Worst-Case Load Temperature, and Working Zone. The transfer time has been tightened from 5 minutes to 1 mi-nute. Five new test conditions have been added as well as a caution on test conditions which exceed the glass transition temperature of plastic package solid devices. JESD22-A105C Published: Jan-2004 POWER AND TEMPERATURE CYCLING: The power and temperature cycling test is performed to determine the ability of a device to withstand alternate exposures at high and low temperature extremes and simultaneously the operating biases are periodically applied and removed. It is intended to simulate worst case conditions encountered in application environments. The power and temperature cycling test is considered destructive and is only intended for device qualification. This test method applies to semi-conductor devices that are subjected to temperature excursions and required to power on and off during all temperatures. JESD22-A106B Published: Jun-2004 THERMAL SHOCK: This test is conducted to determine the resistance of a part to sudden exposure to extreme changes in temperature and to the effect of al-ternate exposures to these extremes. JESD22-A104C 发布:2005年5月 温度循环: 本标准提供了一种用于确定固态器件耐受极限温度循环能力的方法。在本修订版中,改变之处包括最坏条件下,加载温度而不是试验箱环境温度必须达到规定的极值的要求。这保证了无论试验箱负载情况如何,试验样品均会达到规定的温度极值。本修订版提供了负载监控传感器,最坏情况负载温度,以及工作区的定义。转换时间由5分钟加严到1分钟。新增了五个试验条件,以及试验条件超过塑封固态器件玻璃化转变温度时的注意事项。 6. A104 温度循环 JESD22-A105C 发布:2004年1月 功率温度循环: 功率温度循环试验用于确定器件耐受变化的暴露于极限高低温,同时周期性施加和去除工作偏置。本试验的目的是模拟应用环境中达到的最严苛条件。功率温度循环试验视为破坏性,且只用于器件的鉴定。本试验方法应用于需经受超温,需要在所有温度条件上下电的半导体器件。 7. A105 上电温循 JESD22-A106C 发布:2004年6月 热冲击: 本试验用于确定部件对于突然暴露于极限温变条件的抵抗力,以及交替暴露于这些极限条件的影响。 8. A106 热冲击 JESD22-A107C Published: April-2013 SALT ATMOSPHERE: This salt Atmosphere test is conducted to determine the resistance of solid state devices to corrosion. It is an accelerated test that simu-lates the effects of severe seacoast atmosphere on all exposed sur-faces. The salt atmosphere test is considered destructive. It is in-tended for lot acceptance, process monitor, and qualification testing. The latest revision of Method 1041 of MIL-STD-750 shall be used for discrete solid-state devices. The latest revision of Method 1009 of MIL-STD-883 shall be used for solid-state microcircuits, integrated circuits, hybrids, and modules. JESD22-A108C Published: Jun-2005 TEMPERATURE, BIAS, AND OPERATING LIFE: A revised method for determining the effects of bias conditions and temperature, over time, on solid state devices is now available. Revi-sion B of A108 includes low temperature operating life (LTOL) and high temperature gate bias (HTGB) stress conditions, revised cool down requirements for high temperature stress, and a procedure to follow if parts are not tested within the allowed time window. JESD22-A109B Published: Nov-2011, Rewrite of total doc to point to Military stand-ards. HERMETICITY: Most of these tests are controlled and updated in the military stand-ards, the two standards that apply are MIL-STD-750 for Discretes, & MIL-STD-883 for microcircuits. The test within these standards can be used for all package types. Within these standards the tests are similar; MIL-STD-750 Test Method 1071 Hermetic Seal is recommended for any commercial hermetic requirements. For MIL-STD-883 the applicable test method is 1014 Seal. JESD22-A107C 发布:2013年4月 盐雾: 本盐雾试验用于确定固态器件对于腐蚀的抵抗力。本方法是一个加速试验方法,模拟严酷的海滨气氛环境对所有暴露表面的影响。本盐雾试验视为破坏性。本试验可用于批接收,工艺监控,以及鉴定试验。 MIL-STD-750试验方法1041的最后修订版应用于分立固态器件。 MIL-STD-883试验方法1009的最后修订版应用于固态微电路、集成电路及组件。 JESD22-A108C 发布:2005年6月 温度,偏置电压,以及工作寿命: 本标准提供了一个可用的经修订的试验方法,用于确定偏置条件和温度在长时间下对固态器件的作用。A108修订版B包括了低温工作寿命(LTOL)以及高温栅偏(HTGB)应力条件,修订了高温应力的冷却需求,以及如果样品没有在允许的时间窗口中测试的情况下,应遵循的程序。 JESD22-A109A 发布:2011年11月,重新编制了整份文档以指向军用标准。 密封: 大部分这些试验在军用标准中控制和更新,应用的两份标准分别是MIL-STD-750(分立器件),以及MIL-STD-883(微电路)。这些试验能够被用于所有的封装类型。 在这些标准中,试验方法是类似的,MIL-STD-750试验方法1071推荐作为所有商用密封的要求。 对于MIL-STD-883,可应用的试验方法是试验方法1014密封。 9. A107 盐雾 10. A108 温度,偏置电11. A109 密封(指向军标) 压,以及工作寿命 JESD22-A110D Published: Nov-2010 HIGHLY ACCELERATED TEMPERATURE AND HUMIDITY STRESS TEST (HAST) The purpose of this new test method is to evaluate the reliability of nonhermetic packaged solid state devices in humid environments. It employs severe conditions of temperature, humidity, and bias that accelerate the penetration of moisture through the external protective material (encapsulant or seal) or along the interface between the ex-ternal protective material and the metallic conductors which pass through it. JESD22-A111A Published: May-2004 EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IM-MERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES: Frequently, small Surface Mount Devices (SMDs) are attached to the bottom side of a printed circuit board by passing them through a wave solder (full body immersion) while simultaneously soldering devices with pins on the top of the board (plated through hole attach). As a result, these small SMDs may be exposed to high temperatures as high as 265 °C during this type of board attach method. If sufficient moisture exists in the package, exposure to the molten solder causes the moisture to turn to vapor, resulting in increased pressure within the package which in turn may cause quality and/or reliability degradation. The test method in this document will address the issues related to the determination of the capability of a solid state device to withstand the stresses of full body wave solder immersion and subsequent field use. JESD22-A110D 发布:2010年11月 高加速温湿度应力试验(HAST): 该新的试验方法的目的是评价非气密封装固态器件在潮湿环境下的可靠性。它采用严酷的温度、湿度和偏执电压以加速水汽对外部保护材料(封装或密封)或沿着外部保护性材料和金属导体间的界面的穿透作用。 12. A110 高加速温湿度应力试验(HAST) 13. A111 安装在单面板底面的小型表贴固态器件耐浸焊能力的评价流程 JESD22-A111A 发布:2004年5月 安装在单面板底面的小型表贴固态器件耐浸焊能力的评价流程: 小型表贴器件(SMDs)常常被贴装在印制线路板底面,通过一次波峰焊接(整体浸焊)同时焊接表贴器件和安装在印制线路板正面的插装器件(通过通孔安装)。结果是在这种组装方法下,这些小型SMDs可能暴露于高至265℃的高温。 如果足够多的水汽存在于封装内,暴露于熔化的焊料引起水分变为蒸汽,导致封装内部压强,可引起质量和可靠性退化。 本试验方法关注与确定固态器件耐受整体波峰/浸焊能力,以及随后的使用相关的问题。 JESD22-A112-A Published: Nov-1995 Rescinded May 2000 MOISTURE-INDUCED STRESS SENSITIVITY FOR PLASTIC SURFACE MOUNT DEVICES - SUPERSEDED BY J-STD-020A, April 1999. J-STD-020 is now on revision D.01. JESD22-A113F Published: Oct-2008 PRECONDITIONING OF PLASTIC SURFACE MOUNT DEVICES PRIOR TO RELIABILITY TESTING: This Test Method establishes an industry standard preconditioning flow for nonhermetic solid state SMDs (surface mount devices) that is representative of a typical industry multiple solder reflow operation. These SMDs should be subjected to the appropriate preconditioning sequence of this document by the semiconductor manufacturer prior to being submitted to specific in-house reliability testing (qualification and reliability monitoring) to evaluate long term reliability (which might be impacted by solder reflow). JESD22-A114F Published: Dec-2008 ELECTROSTATIC DISCHARGE (ESD) SENSITIVITY TESTING HUMAN BODY MODEL (HBM): This test method establishes a standard procedure for testing and classifying microcircuits according to their susceptibility to damage or degradation by exposure to a defined electrostatic Human Body Model (HBM) discharge (ESD). The objective is to provide reliable, repeatable HBM ESD test results so that accurate classifications can be performed. JESD22-A112-A 发布:1995年11月,2000年5月取消 塑封表贴器件水汽诱发的应力敏感性,被J-STD-020A替代,1999年4月。 J-STD-020现行版本为修订版D.01. 14. A112 塑封表贴器件水15. A113 塑封表贴器件可靠性汽诱发的应力敏感性试验前的预处理 (被J-STD-020替代) 16. A114 静电放电敏感性试验(ESD)人体模型(HBM) JESD22-A113F 发布:2008年8月 塑封表贴器件可靠性试验前的预处理: 本试验方法建立了一个非气密固态SMDs(表面贴装器件)的工业标准化的预处理流程,这一流程代表了一个典型的工业化多次回流焊接操作。这些SMDs在由半导体制造商进行规定的内部可靠性试验(鉴定及可靠性监控)前,应经受本文档中适当的预处理序列,以评估长期可靠性(器件的长期可靠性可能受到回流焊接过程的影响)。 JESD22-A114F 发布:2008年12月 静电放电敏感性试验(ESD)人体模型(HBM): 本试验方法建立了一个通过将微电路暴露在定义的人体模型的静电放电应力下,根据其受损或降级的敏感度,对微电路进行试验和评级的标准化流程。目标是提供可靠的,可重复性的HBM ESD试验结果,以使准确的等级评定能够进行。 JESD22-A115A Published: Oct-1997 This is a valid test method, however it is not currently being used in the industry, the preferred industry test methods are JESD22A114 or JESD22C101. ELECTROSTATIC DISCHARGE (ESD) SENSITIVITY TESTING MACHINE MODEL (MM): This method establishes a standard procedure for testing and clas-sifying microcircuits according to their susceptibility to damage or degradation by exposure to a defined Machine Model (MM) electro-static discharge (ESD). The objective is to provide reliable, repeata-ble MM ESD test results so that accurate classifications can be per-formed. JESD22-A117A Published: Mar-2006 ELECTRICALLY ERASABLE PROGRAMMABLE ROM (EEPROM) PROGRAM/ERASE ENDURANCE AND DATA RETENTION TEST: This method establishes a standard procedure for determining the data cycling endurance and data retention capability of non-volatile memory cells. It is intended as a qualification and monitor test pro-cedure. This test is also applicable to FLASH EEPROM integrated circuits and Erasable Programmable Logic Devices (EPLD) with embedded EEPROM or FLASH memory. JESD22-A115A 发布:1997年10月。本试验方法有效,然而却不是业界常用标准,推荐的工业试验方法为JESD22A114或JESD22C101 静电放电敏感性试验(ESD)机器模型(MM): 本试验方法建立了一个通过将微电路暴露在定义的人体模型的静电放电应力下,根据其受损或降级的敏感度,对微电路进行试验和评级的标准化流程。目标是提供可靠的,可重复性的MM ESD试验结果,以使准确的等级评定能够进行。 17. A115 静电放电敏感性试验(ESD)机器模型(MM) 18. A117 电可擦除可编程只读存储器(EEPROM)编程/擦除耐久性以及数据保持试验 JESD22-A117A 发布:2006年3月 电可擦除可编程只读存储器(EEPROM)编程/擦除耐久性以及数据保持试验: 本方法建立了一个标准化的流程,以确定非易失存储单元的数据循环耐久性和数据保持能力。本试验方法可用于鉴定和监控试验流程。本试验也可用于FLASH EEPROM集成电路以及带有内嵌的EEPROM或FLASH存储器的可擦除可编程逻辑器件(EPLD)。 JESD22-A118A Published: Mar-2011 ACCELERATED MOISTURE RESISTANCE - UNBIASED HAST: The Unbiased HAST is performed for the purpose of evaluating the reliability of non-hermetic packaged solid-state devices in humid en-vironments. It is a highly accelerated test which employs temperature and humidity under noncondensing conditions to accelerate the pen-etration of moisture through the external protective material (encap-sulant or seal) or along the interface between the external protective material and the metallic conductors which pass through it. Bias is not applied in this test to ensure the failure mechanisms potentially overshadowed by bias can be uncovered (e.g. galvanic corrosion). This test is used to identify failure mechanisms internal to the pack-age and is destructive. JESD22-A119 Published: Nov-2004 LOW TEMPERATURE STORAGE LIFE The test is applicable for evaluation, screening, monitoring, and/or qualification of all solid state devices. Low Temperature storage test is typically used to determine the effect of time and temperature, under storage conditions, for thermally activated failure mechanisms of solid state electronic devices, including nonvolatile memory de-vices (data retention failure mechanisms). During the test reduced temperatures (test conditions) are used without electrical stress ap-plied. This test may be destructive, depending on Time, Temperature and Packaging (if any). JESD22-A118A 发布:2011年3月 加速水汽抵抗性——无偏压HAST: 无偏压HAST用于评估非气密封装固态器件在潮湿环境下的可靠性。这是一个高加速试验方法,利用非冷凝条件下的温度和湿度来加速水汽对外部保护性材料(封装或密封)或沿着外部保护材料和贯通其的金属导体的界面的穿透作用。不施加偏压以保证被偏置电压掩盖的失效机理能够被发现(如:贾凡尼式腐蚀(原电池腐蚀))。本试验用于确定封装内部的失效机理,为破坏性试验。 19. A118 加速水汽抵抗性——无偏压20. A119 低温贮存寿命 HAST JESD22-A119 发布:2004年11月 低温贮存寿命: 本试验可用于所有固态器件的评估,筛选,监控以及鉴定。低温贮存试验通常用于确定在贮存条件下,时间和温度对固态电子器件,包括非易失储存器件(数据滞留失效机理),由热激发的失效机理的效应。在试验中,只施加降低的温度应力(试验条件),而不施加电应力。本试验取决于时间,温度和包装(如果有),可能为破坏性。 JESD22-A120A Published: Jan-2008 TEST METHOD FOR THE MEASUREMENT OF MOISTURE DIF-FUSIVITY AND WATER SOLUBILITY IN ORGANIC MATERIALS USED IN INTEGRATED CIRCUITS: This specification details the procedures for the measurement of characteristic bulk material properties of moisture diffusivity and water solubility in organic materials used in the packaging of IC compo-nents. These two material properties are important parameters for the effective reliability performance of plastic packaged ICs after expo-sure to moisture and subjected to high temperature solder reflow. JESD22-A121A Published: Jul-2008 MEASURING WHISKER GROWTH ON TIN AND TIN ALLOY SURFACE FINISHES The predominant terminal finishes on electronic components have been Sn-Pb alloys. As the industry moves toward Pb-free compo-nents and assembly processes, the predominant terminal finish ma-terials will be pure Sn and alloys of Sn, including Sn-Bi and Sn-Ag. Pure Sn and Sn-based alloy electrodeposits and solder-dipped fin-ishes may grow tin whiskers, which could electrically short across component terminals or break off the component and degrade the performance of electrical or mechanical parts. JESD22-A122 Published: Aug-2007 POWER CYCLING This Test Method establishes a uniform method for performing component package power cycling stress test. This specification covers power induced temperature cycling of a packaged component, simulating the non-uniform temperature distribution resulting from a device powering on and off in the application. JESD22-A120A 发布:2008年1月 用于集成电路的有机材料的水汽扩散率以及水溶解度试验方法: 本规范细化了测试用于IC封装部件的有机材料的两项特性,即块状材料的水汽扩散率和水溶解度。由于塑封IC可能暴露于水汽环境,并经历高温焊接回流过程,因此,这两项材料特性是保障后其有效的可靠性能的重要参数。 21. A120 用于集成电路的有机材料的水汽扩散率以及水溶解度试验方法 22. A121 锡及锡合金表面镀层晶须生长的测试方法 23. A122 功率循环 JESD22-A121A 发布:2008年7月 锡及锡合金表面镀层晶须生长的测试方法: 电子元器件主要的引脚镀层曾主要使用锡铅合金。随着业界向无铅元器件和组装工艺转变,主要的引脚镀层材料变为纯锡以及锡合金,包括锡铋以及锡银合金。电镀和浸焊的纯锡及锡基合金镀层可能生长锡须,锡须会引起元器件引脚间电气短路,或从元器件脱落,引起电气或机械部件的性能退化。 JESD22-A122 发布:2007年8月 功率循环: 本试验方法建立了一种统一的方法,以对元器件封装进行功率循环应力试验。本规范覆盖了封装元器件功率相关的温度循环变化,模拟在应用条件下由于上电和下电导致的温度分布不均一性。 JESD22-B100B Published: Jun-2003 Reaffirmed June 2006 PHYSICAL DIMENSION: The standard provides a method for determining whether the external physical dimensions of the device are in accordance with the appli-cable procurement document. This revision includes a change in details to be specified by the procurement document. JESD22-B101A Published: Oct-2004 EXTERNAL VISUAL: The purpose of this inspection is to verify that the materials, design, construction, markings, and workmanship of the device are in ac-cordance with the applicable procurement document. External visual is a nondestructive test and applicable for all package types. The test is useful for qualification, process monitor, or lot acceptance. JESD22-B102E Published: Oct-2007 SOLDERABILITY: This test method provides optional conditions for preconditioning and soldering for the purpose of assessing the solderability of device package terminations. It provides procedures for dip & look soldera-bility testing of through hole, axial and surface mount devices and a surface mount process simulation test for surface mount packages. The purpose of this test method is to provide a means of determining the solderability of device package terminations that are intended to be joined to another surface using lead (Pb) containing or Pb-free solder for the attachment. JESD22-B100B 发布:2003年6月,2006年6月重新确认 物理尺寸: 本标准提供了一个确定器件的外部物理尺寸是否和采购文件相符合的方法。本修订版包括了一处由采购文件规定的细节的修改。 JESD22-B101A 发布:2004年10月 外部目检: 本检查的目的是验证器件的材料,设计,构造,标志以及工艺是否与采购文件相符合。外部目检是一种非破坏性测试,可对所有封装类型应用。本测试方法可用于鉴定,过程监控或批接收检验。 JESD22-B102E 发布:2007年10月 可焊性: 本试验方法以评价器件封装引脚的可焊性为目的,提供了一个可选的预处理及焊接的条件。本标准为通孔安装器件,轴向及表贴器件提供了浸焊并观察的可焊性试验程序,并给出了表贴封装的表贴工艺模拟试验。本试验方法的目的是为准备使用含铅(Pb)或无铅焊料连接到另一个表面的器件封装引脚提供一种确定可焊性的方法。 24. B100 物理尺寸 25. B101 外部目检 26. B102 可焊性 JESD22-B103B Published: Jun-2002 Reaffirmed June 2006 VIBRATION, VARIABLE FREQUENCY: The Vibration, Variable Frequency Test Method is intended to de-termine the ability of component(s) to withstand moderate to severe vibration as a result of motion produced by transportation or filed operation of electrical equipment. This is a destructive test that is in-tended for component qualification. JESD22-B104C Published: Nov-2004 - Typo found on pg.1 in title, a new version dated December 2004 has been posted. if you downloaded between 11/10/04 & 12/10/04, please download again MECHANICAL SHOCK: This test is intended to determine the suitability of component parts for use in electronic equipment that may be subjected to moderately severe shocks as a result of suddenly applied forces or abrupt changes in motion produced by rough handling, transportation, or field operation. Shock of this type may disturb operating characteris-tics, particularly if the shock pulses are repetitive. This is a destructive test intended for device qualification. It is normally applicable to cav-ity-type packages. JESD22-B103B 发布:2002年1月,2006年6月再次确认 振动,变频: 变频振动试验方法意在确定部件耐受由电气设备运输或现场工作引起的从适度到严酷的振动应力的能力。这是一个破坏性试验,用于部件的鉴定。 27. B103 振动,变频 28. B104 机械冲击 JESD22-B104C 发布:2004年11月 - 在第一页发现排版错误,2004年12月发布了一个新版本。如果你在11/10/04和12/10/04之间下载,请再下载一次 机械冲击: 本试验意在确定用于电子设备的部件和元器件对可能的适度严酷冲击应力的适应性,这种冲击应力可能来自于粗暴处理,运输或现场工作引发的突然施加的力或突发的运动改变。这种类型的冲击可能妨碍工作特性,尤其当冲击脉冲为重复性时。本试验时一种破坏性试验,用于器件鉴定。通常可应用于空腔类型的封装形式。 JESD22-B105C Published: May-2003 Reaffirmed June 2006 LEAD INTEGRITY: This test method provides various tests for determining the integrity lead/package interface and the lead itself when the lead(s) are bent due to faulty board assembly followed by rework of the part for re-assembly. For hermetic packages it is recommend that this test be followed by hermeticity tests in accordance with Test Method A109 to determine if there are any adverse effects from the stresses applied to the seals as well as to the leads. These tests, including each of its test conditions, is considered destructive and is only recommended for qualification testing. This test is applicable to all through-hole de-vices and surface-mount devices requiring lead forming by the user. JESD22-B106D Published: Apr-2008 RESISTANCE TO SOLDER SHOCK FOR THROUGH-HOLE MOUNTED DEVICES: This method established a standard procedure for determining whether through-hole solid state devices can withstand the effects of the temperature to which they will be subject during soldering of their leads. This revision updates the references to currently military standards. JESD22-B107C Published: Sep-2004 MARKING PERMANENCY: This test method provides two tests for determining the marking permanency of ink marked integrated circuits. A new non-destructive tape test method is introduced to quickly determine marking integrity. The test method also specifies a resistance to solvents method based upon MIL Std 883 Method 2015. JESD22-B105C 发布:2003年5月,2006年6月再次确认 引出端完整性: 本试验方法提供了多种试验,以确定在由于不当的板级组装,伴随部件返修的重组装时,引脚/封装界面以及引脚本身的完整性。对于气密封装,推荐在本试验后进行密封试验,可根据试验方法A109进行,以确定施加在密封处以及引脚上的应力是否产生了任何不利的影响。这些试验,包括每个试验条件,均视为破坏性,只推荐用于鉴定试验。本试验适用于需要由用户进行整脚的通孔安装和表贴器件。 29. B105 引出端完整性 JESD22-B106D 发布:2008年4月 通孔安装期间的耐焊接冲击: 本试验方法建立了一个标准化的流程,以确定通孔安装固态器件是否能耐受它们在引脚焊接过程中可能经受的温度。本修订版更新了对现有军用标准的参考。 30. B106 通孔安装期间31. B107 标识耐久性 的耐焊接冲击 JESD22-B107C 发布:2004年9月 标识耐久性: 本试验方法提供了两个试验,以确定墨水打标的集成电路的标识的耐久性。介绍了一个新的非破坏性的胶带试验方法以快速确定标识的完整性。本试验方法也规定了一种基于MIL-STD-883方法2015的耐溶剂性试验。 JESD22-B108A Published: Jan-2003 COPLANARITY TEST FOR SURFACE-MOUNT SEMICONDUCTOR DEVICES: The purpose of this test is to measure the deviation of the terminals (leads or solder balls) from coplanarity for surface-mount semicon-ductor devices. JESD22-B109 Published: Jun-2002 FLIP CHIP TENSILE PULL: The Flip Chip Tensile Pull Test Method is performed to determine the fracture mode and strength of the solder bump interconnection be-tween the flip chip die and the substrate. It should be used to assess the consistency of the chip join process. This test method is a de-structive test. JESD22-B110A Published: Nov-2004 SUBASSEMBLY MECHANICAL SHOCK: The new test method JESD22-B110 provides guidance for in-situ testing of mechanical shock resistance of components as mounted in a subassembly. Using terms, procedures, and test levels in common with JESD22-B104B, this test method provides a range of test level options to improve test applicability and compatibility with fragility test procedures. Test procedures are detailed, including test card and fixture needs, test tolerances, test documentation, component prep-aration, and definition of terms. JESD22-B108A 发布:2003年1月 表贴半导体器件的共面性试验: 本试验的目的是测量表贴半导体器件引出端(引脚或焊球)的共面性偏差。 32. B108 表贴半导33. B109 倒装芯片拉34. B110 组件机械冲击 体器件的共面性脱试验 试验 JESD22-B109 发布:2002年6月 倒装芯片拉脱试验: 倒装芯片拉脱试验方法用于确定断裂模式以及倒装芯片和基板间焊球互连的强度。 JESD22-B110A 发布:2004年11月 组件机械冲击: 这个心的试验方法JESD22-B110提供了部件机械冲击抵抗力原位试验的指引,原位指的是试验时部件的安装条件与子组件中一致。本试验方法采用的条款,流程以及试验水平与JESD22-B104B通用,提供了可供选择的试验水平的范围,以增进试验的应用性以及与脆弱性试验的兼容性。本标准细化了试验流程,包括试验卡以及夹具的需求,试验的容差,试验文件,部件预处理以及条款的定义。 JESD22-B111 Published: Jul-2003 BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS: This Board Level Drop Test Method is intended to evaluate and compare drop performance of surface mount electronic components for handheld electronic product applications in an accelerated test environment, where excessive flexure of a circuit board causes product failure. The purpose is to standardize the test board and test methodology to provide a reproducible assessment of the drop test performance of surface mounted components while duplicating the failure modes normally observed during product level test. JESD22-B112 Published: May-2005 HIGH TEMPERATURE PACKAGE WARPAGE MEASUREMENT METHODOLOGY The purpose of this test method is to measure the deviation from uniform flatness of an integrated circuit package body for the range of environmental conditions experienced during the surface-mount soldering operation. JESD22-B111 发布:2003年7月 手持电子产品组件的板级跌落试验方法: 本板级跌落试验方法意在以一个加速试验环境评估和比较手持电子产品应用的表贴电子部件的抗跌落性能,在这个加速试验环境中,过度的弯曲电路板引起产品失效。这一试验的目的是标准化试验板和试验方法,以提供一个表贴部件跌落试验性能的高再现性的评定方法,暴露通常在产品级试验中失效模式 35. B111 手持电子产品组件的板级跌落试验 36. B112 高温封装翘曲度测试方法 JESD22-B112 发布:2005年5月 高温封装翘曲度测试方法: 本试验方面的目的是测量在经历了表面组装焊接过程中的环境条件范围后,集成电路封装体平坦度的偏差。 JESD22-B113 Published: Mar-2006 BOARD LEVEL CYCLIC BEND TEST METHOD FOR INTERCON-NECT RELIABILITY CHARACTERIZATION OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS The Board Level Cyclic Bend Test Method is intended to evaluate and compare the performance of surface mount electronic compo-nents in an accelerated test environment for handheld electronic products applications. The purpose is to standardize the test meth-odology to provide a reproducible performance assessment of sur-face mounted components while duplicating the failure modes nor-mally observed during product level test. This is not a component qualification test and is not meant to replace any product level test that may be needed to qualify a specific product and assembly. JESD22-B115 Published: May-2007 SOLDER BALL PULL This document describes a test method only; acceptance criteria and qualification requirements are not defined. This test method applies to solder ball pull force testing prior to end-use attachment. Solder balls are pulled individually using mechanical jaws; force and failure mode data are collected and analyzed. Other specialized solder ball pull methods using a heated thermode, gang pulling of multiple solder joints, etc., are outside the scope of this document. Both low and high speed testing are covered by this document. JESD22-B113 发布:2006年3月 手持电子产品组件互连可靠性特性的板级循环弯曲试验方法: 板级循环弯曲试验方法旨在评估和比较手持电子产品中应用的表贴电子元器件,在一个加速的试验环境下的性能。标准化本试验方法的目的在于为表贴元器件提供一个可再现的性能评价方法,以复现通常在产品级试验中才能观察到的失效模式。本方法不是一个元器件鉴定试验方法,并且不能取代任何用以鉴定特定产品或组件的产品级试验。 37. B113 手持电子产品组件互连可靠38. B115 焊球拉脱试验 性特性的板级循环弯曲试验方法 JESD22-B115 发布:2007年5月 焊球拉脱试验: 本文档仅仅描述了一个试验方法,并没有规定接收判据以及鉴定要求。本试验方法用于焊球拉脱力试验先于最终用户组装。使用机械夹持方式一个个的拉脱焊球,收集并分析拉脱力以及失效模式。焊球拉脱试验还有其他试验方法,例如使用一个加热体,将多个焊球一起拉脱等,这些特定的试验方法不包括在本文档的范围内。本文档覆盖了低速以及高速试验方法。 JESD22-B116 Published: Jul-1998 WIRE BOND SHEAR TEST: This test method establishes a standard procedure for determining the strength of an integrated circuit wire bond by shearing the wire from the surface it is bonded to and measuring the force required. This method serves as an alternative to pulling the wire vertically until the wire separates from one of it's two bonded surfaces. It also pro-vides guidelines for determining an appropriate minimum shear force for gold balls on aluminum alloy bonding surfaces. JESD22-B117A Published: Oct-2006 SOLDER BALL SHEAR: The purpose of this test is conducted to assess the ability of solder balls to withstand mechanical shear forces that may be applied during device manufacturing, handling, test, shipment and end-use condi-tions. Solder ball shear is a destructive test. JESD22B114 Published: Mar-2008 MARK LEGIBILITY This standard describes a nondestructive test to assess solid state device mark legibility. The specification applies only to solid state devices that contain markings, regardless of the marking method. It does not define what devices must be marked or the method in which the device is marked, i.e., ink, laser, etc. The standard is limited in scope to the legibility requirements of solid state devices, and does not replace related reference documents listed in this standard. JESD22-C100-A Published: Apr-1990 Rescinded HIGH TEMPERATURE CONTINUITY - RESCINDED, November 1999 JESD22-B116 发布:1998年7月 引线键合的剪切试验: 本试验方法建立了一个标准化的流程,通过将键合引线从键合表面剪切走,并测量所需力的大小的方法,确定集成电路引线键合的强度。本试验作为引线垂直拉脱试验(垂直提拉键合引线,直到两个键合表面中的一个脱离)的替代方法。对于铝金属化上金丝球焊的合金键合表面,本文档还提供了确定一个适当的最小剪切力的指导意见。 JESD22-B117A 发布:2006年10月 焊球剪切试验: 本试验的目的是评估焊球耐受器件制造、处理、试验、运输以及终端使用条件中可能存在的机械剪切力的能力。焊球剪切试验是一个破坏性的试验。 JESD22-B114 发布:2008年3月 标识可识别性: 本标准描述了评估固态器件标识可识别性的一个非破坏性试验方法。本规范只可应用于含有标识的固态器件,无论打标方式如何。本标准没有定义什么样的器件必须打标,或以什么方式打标,比如丝印、激光等。本标准的范围限于固态器件标识的可识别性,并不能替代本标准中列出的相关参考文件。 39. B116 引线键合的剪切试验 40. B117 焊球剪切 41. B114 标识可识别性 JESD22-C100A 发布:1990年4月,已废止 高温连续性-1999年11月废止 42. C100 高温连续性 已废止 JESD22-C101D Published: Oct-2008 FIELD-INDUCED CHARGED-DEVICE MODEL TEST METHOD FOR ELECTROSTATIC DISCHARGE WITHSTAND THRESHOLDS OF MICROELECTRONIC COMPONENTS: This new test method describes a uniform method for establishing charged-device model electrostatic discharge withstand thresholds. The charged-device-model simulates charging/discharging events that occur in production equipment and processes. Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing. One of many examples is a device sliding down a shipping tube hitting a metal surface. Discharges to devices on un-terminated circuit assemblies are also well-modeled by the CDM test. CDM ESD events not only reduce assembly yields but can also produce device damage that goes undetected by factory test and later is the cause of a latent failure. JESD22-C101D 发布:2008年10月 微电子器件静电放电耐量试验方法,场诱导带电器件模型: 本试验方法描述了建立静电放电耐量的带电器件模型的一个统一的试验方法。带电器件模型(CDM)模拟了发生在生产设备和工艺过程中的充电/放电事件。在生产过程中,如果发生金属-金属接触,CDM静电放电(ESD)事件均有潜在发生的可能。其中一个例子是器件从运输包装管中滑出,碰到一个金属表面。CDM试验也可很好的对未接地的电路组件中的器件的放电进行建模。CDM ESD时间不仅降低组装合格率,而且可能引起器件的潜在损伤,这种潜在损伤无法通过工厂测试,但会在以后引起失效。 43. C101微电子器件静电放电耐量试验方法,场诱导带电器件模型
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